![]() The ZedBoard is used to control data capture and buffering. The EVAL-AD4030-24FMCZ evaluation board is designed for use with the Digilent ZedBoard. The evaluation board demonstrates the performance of the AD4030-24 and provides a configurable analog front end (AFE) for a variety of system applications. The AD4030-24 is a low power, 24-bit precision SAR ADC that supports up to 2 MSPS. The EVAL-AD4030-24FMCZ evaluation board enables quick and easy evaluation of the AD4030 family of 24-bit precision successive approximation register (SAR) analog-to-digital converters (ADCs). ![]() ![]() ![]() The 7 mm × 7 mm, 64-Ball CSP_BGA package of the AD4030-24/AD4032-24 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout. Echo clock mode and ADC host clock mode relax the timing requirements and simplify the use of digital isolators. A wide data clocking window, multiple SDO lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS or 500 kSPS. The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. Both single-ended and differential signals are supported. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4030-24/AD4032-24. The wide differential input and common mode ranges allow inputs to use the full ±V REF range without saturating, simplifying signal conditioning requirements and system calibration. A block averaging filter with programmable decimation ratio can increase dynamic range up to 155.5 dB. The low noise floor enables signal chains requiring less gain and lower power. The AD4030-24/AD4032-24 offer a typical dynamic range of 109 dB when using a 5 V reference. Figure 1 shows the functional architecture of the AD4030-24/AD4032-24.Ī low drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. With a guaranteed maximum ☐.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/AD4032-24 achieve unparalleled precision from −40☌ to +125☌. ![]() The AD4030-24/ AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive ™. ![]()
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